Kim Flint

PO Box 40240, Berkeley, CA 94704-4240, 510-682-9047 -


Signal Integrity Engineering Management or Hardware Engineering Management position.



Over 10 years management experience in electronics and semiconductor industries, managing highly productive Signal Integrity, Power Integrity, and System Engineering teams. Deep experience with full product design cycle at silicon, package, and system levels.


Work Experience

NVIDIA, Inc., Santa Clara, CA. 10/2003 - present

Manager, Signal Integrity Engineering (8/2006 – present) – manage the IOSI signal integrity group in NVIDIA’s VLSI department. Responsible for signal and power integrity for all NVIDIA products, from silicon to package to PCB. Technology areas include Core VDD, DDR3, GDDR3, GDDR5, LPDDR2, SATA, PCIe, DisplayPort, HDMI, Intel FSB, USB, and many others. Grew team to 14 highly skilled, professional signal integrity engineers.

Developed key functional SI roles within the team, gaining efficiency and encouraging ownership of responsibility among SI engineers. These include NVIDIA’s design guide process, SI chip owner process, SI board owner process.

Led NVIDIA task forces to

·       Develop NVIDIA Core VDD power integrity methodology to transistor level

·       Develop automated parameter training for NVIDIA I/O interfaces

·       Develop NVIDIA core logic timing methodology to account for jitter induced by power noise


Senior Signal Integrity Engineer (10/2003 – 7/2006) – Responsible for all signal integrity and power integrity analysis for numerous NVIDIA GPU’s and chipsets, including Sony Playstation 3 RSX GPU, G80, Crush 55, Crush 19, MCP04, and others. Signal and power integrity analysis for many io interfaces, including GDDR3, DDR3, Intel FSB, PCIe, SATA, USB, etc. Developed Core VDD analysis methodology for use in large GPU products, correlated simulation results to lab measurements.

Inkra Networks, Inc., Fremont, CA. 11/2000 - 6/2003

Board Development Manager and Signal Integrity Engineer - Dual engineering and management role at early stage networking equipment startup, developing high performance, highly available data networking systems. Joined the company in its first few months of operation and helped build it into a viable operation with multiple products shipping.

As Board Development Manager - Interviewed and hired staff of design and layout engineers. Oversaw daily activities of internal layout staff and external contractors. Designed and implemented Inkra's board design process, including tool selection, component management, symbol and model library creation, schematic entry guidelines, netlisting and BOM generation process, etc. Created sophisticated central component database fully integrated into engineering tools and Operations environment. These processes enabled Inkra to produce dozens of large, highly complex designs with limited staff and resources. Inkra boards had as many as 7000 components, 24 layers, 28,000 nets, and well over 100 schematic pages, and most boards came up on the first try.

As Signal Integrity Engineer - Performed pre- and post-layout signal integrity analysis and simulation on Inkra's high performance networking boards using HSPICE and Cadence SpecctraQuest. Performed timing analysis on all bus interfaces to ensure design margins were met. Developed layout guidelines. Guided layouts for placement, routing topology, power planes, layer usage, stackup, crosstalk management, etc. Designed stackups to meet impedance, power integrity, and EMI requirements. Selected connectors and developed trace geometries for high speed differential backplane signaling.

Used HSPICE to simulate I/O for Inkra's custom ASIC. Provided timing data to the ASIC team for timing analysis. Created SPICE models of packages, board traces and topology , terminations, and receiver devices. Designed ASIC pinout and aided in package selection. Designed ASIC bringup board for in-system verification.

Used scopes and TDR analyzers to verify signal quality and timing in the lab. Inkra designs had very few signal integrity issues and all passed EMI testing on the first try.

Typical technologies used on Inkra boards included DDR, SDRAM, Rambus, Cache SRAMs, 2.5gps differential LVDS backplane signaling, Gigabit Ethernet, PCI, CSIX, processor busses, etc.

ATI Research, Inc.,
Santa Clara, CA. 11/98 - 11/2000

Systems and Hardware Engineering - Electronics, hardware, and systems engineering for high performance PC, Laptop, PC-appliance, and embedded multimedia systems for consumer markets. Developed motherboard debug and reference systems for ATI's graphics, chip set, System-On-Chip, and processor products.

Manager, System Engineering, (10/99 - 11/2000). Manager for System Engineering, Signal Integrity, PCB Layout, and Lab teams at ATI Research. Built highly productive team of 11 engineers and lab technicians. Responsible for all board design and development, system-level architecture, pinout designs, board layouts, prototype production, in-system silicon verification, and lab bringup for silicon and boards. Duties included hiring, performance reviews, technical guidance, project management for multiple simultaneous projects, setting group priorities, determining engineering methodologies, and maintaining communication with numerous groups across ATI's multi-site engineering operation. Ensured that ATI's highly integrated silicon products met cost, performance, feature, and reliability requirements of real-world system use.

Lead Engineer, Systems Engineering group, (4/99 - 10/99). Led three engineers in the Systems Engineering team at ATI’s advanced R&D division. Responsible for completion and performance of all system engineering projects. Oversee engineering of board-level hardware systems for debug and evaluation of latest ATI processors and SOC products. Define specifications for system level architecture. Provide input to architectural definitions of ATI’s system on chip processors. Work closely with package and VLSI I/O designers to develop pinout and package definitions, with emphasis on high-performance signal integrity and low-cost, manufacturable designs. Provide signal integrity analysis and design for board level hardware. Very involved with latest PC industry initiatives and developments and their impact on ATI products.

Senior Hardware Engineer, Advanced R&D group, (11/98 - 4/99). Continuing projects begun at Chromatic. Design and development engineering on debug and evaluation systems hardware. Oversaw schematic and layout design, ensuring a high quality product appropriate for silicon bringup efforts. Managed integration efforts with Chromatic and ATI's system engineering teams.

Chromatic Research, Inc., Sunnyvale, CA. 6/96 - 11/98

(Chromatic Research was purchased by ATI Technologies, Inc. in November, 1998, becoming ATI Research, Inc.)

Systems and Hardware Engineering

Electronics, hardware, and systems engineering for high performance PC multimedia systems. Designed AGP cards, PCI cards, motherboards, and debugging platforms using Chromatic’s VLIW media processors. Designs typically included high quality analog and digital audio, video I/O, VGA, modem, joystick, PCI/AGP bus interfaces, and high speed Rambus memory interfaces.

Senior Hardware Engineer, Advanced R&D group, (4/98 - 11/98).
Developed and designed debug and evaluation motherboard for silicon bringup of Chromatic SOC processor. Provided key systems engineering analysis of new marketing proposals, provided input on overall system architecture design of new processors while working closely with marketing and VLSI design, and developed the specs for power management in latest Chromatic/ATI processor. Defined 600 ball BGA pinouts for Chromatic processors, working closely with VLSI and package designers. Provided signal integrity analysis of board level hardware and new processor interfaces.

Senior Hardware Engineer, VLSI Engineering Group, (11/96 - 4/98).
Designed debugging systems and PCB hardware for initial silicon bringup. Systems provided features for VLSI design verification and initial software development, while giving a close representation of final production hardware. Designed first prototype production systems for new Chromatic media processors, from which subsequent reference PCB designs were built. Met critical schedule milestones, allowing silicon development to proceed uninterrupted. Oversaw efforts of PCB layout designers, purchasers, and lab personnel to insure that quality standards and schedules were being met. Developed a reputation for designs that worked correctly on the first power up, without requiring re-spins.

Employed knowledge of high speed and analog design to greatly improve the signal integrity and reliability of Rambus memory channel designs, operating at 300MHz (600Mbps), as well as other high speed interfaces like VGA and AGP. Developed new circuit techniques to meet difficult noise and reliability requirements. Regularly called upon to provide expert consulting on signal integrity and EMI problems for Chromatic key customers, such as Diamond, STB, Leadtek, and Micron.

Worked closely with Chromatic VLSI physical design team on IC padout and packaging design to insure good signal integrity and easy printed circuit board routing. Helped debug severe package related noise problems on an earlier design, ensuring the product made it to market according to schedule.

Hardware Engineer, OEM Engineering group (6/96 - 11/96).
Created reference designs for low-cost, mass production by numerous Chromatic customers. Responsible for bringing designs from initial concept through schematic, layout, prototype fabrication, and debugging. Took designs through EMC scans, solving various emissions problems for FCC/CE certification. Redesigned audio and video sections of existing boards to achieve much higher analog signal quality.

Aurisis Research, LLC, Oakland, CA, 1/97 – 10/2007

Partner, Executive Management, Engineering

Aurisis Research, LLC formed with two other partners as a side company to develop innovative electronic musical instruments. Aurisis primarily licenses products and technologies to large music industry partners, such as the Gibson Guitar Corp. Aurisis is highly regarded for its Loop® technology for real-time sampling and looping products, used in the Gibson Echoplex Digital Pro. Instruments employing Aurisis technology is in use by musicians all over the world.

Roles included all business administration and marketing tasks, program management and business development, contract and licensing negotiations, hardware engineering, product specification and feature design, system architecture design, software DV, documentation, and licensee and customer support.

Gibson Guitar Corporation,
Berkeley, CA, G-WIZ Labs Division, 6/93 - 6/96

Electronics Engineer and Project Manager

Electronics Engineering and Project Management for cutting edge musical instrument R&D lab. In charge of hardware design and development for numerous electronic musical instrument projects.

Project Leader for the Echoplex Digital Pro, a sophisticated digital audio signal processor. The Echoplex received excellent reviews in magazines such as Guitar Player, Keyboard, and Electronic Musician and is still used extensively by musicians throughout the world.

Project Leader for “Guitar Presets” project, an ultra-low power embedded processor system built into an electric guitar or bass. System could provide instant recall of different tone/volume configurations set by the user. Received patent# 5866834 for this design.

Design duties include creation of project ideas, definition of project and design specifications, Analog and Digital Circuit design, PLD design, design of Embedded Processor Systems, Low Power design, Audio Electronics design, and System design.

Management duties include creating project proposals, scheduling project tasks, analyzing costs, overseeing engineers, technicians, and contractors, and ensuring that products are well designed and completed on time.

Contributed greatly to formation and development of the division including establishing engineering library, developing vendor contacts, researching and purchasing lab and computer equipment, interviewing job candidates, defining and implementing engineering procedures.


Nady Systems, Inc., Emeryville, CA, 6/92 - 8/92

Engineering Intern - Worked with the engineering staff in the design of high-quality wireless transmitters for professional stage use. Redesigned the audio stage of the transmitter to meet foreign regulatory requirements without compromising performance.


E & J Advertising, Inc., Santa Rosa, CA, 6/91 - 2/92

Computer Systems Manager - Developed and managed a desktop publishing service bureau in a printing and publishing corporation. Computerized the business operations of the corporation. Caused department revenues to double each month.



University of California, Berkeley

·       Bachelor of Science, Electrical Engineering and Computer Science, December, 1992

·       Areas of Emphasis: Circuits and Systems, Signal Processing,
Communications Systems, Analog Integrated Circuit Design

·       Regents' Scholar - UC Berkeley's most prestigious scholarship

·       Kennedy Interdisciplinary Studies Award, Peace and Conflict Studies



US Patent 5866834 – Digitally controlled analog electric stringed musical instrument and apparatus.




Society Memberships


Personal Interests

Music, guitar and electronic musical instruments, bicycling, western philosophy, political science and theory, international relations, current events.